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Samsung lays out its next four generations of silicon innovation

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Last updated: May 23rd, 2018 at 22:35 UTC+02:00

Samsung may be the biggest chipmaker in the world but it still has a lot of ground to cover in the foundry space. It’s the part of the company’s business that builds processors and chips for other companies. Samsung is the fourth largest player in the global foundry business behind the likes of the Taiwan Semiconductor Manufacturing Company and GlobalFoundries.

The company obviously wants to attract more customers so it has laid out its next four generations of silicon innovation which will power high-performance computing and connected devices of the future. Samsung hopes that this exercise will compel some of its potential customers to approach it for chip manufacturing.

New process technology roadmap goes down to 3-nanometer

It was first reported several months ago that Samsung is going to start manufacturing 7nm processors later this year and that the Galaxy S10 might very well be the first handset on the market next year with a 7nm chip. The company also reportedly started building a production line for its 7nm chips three months back.

Some in the industry feel that time is running out for Moore’s Law which has been the driving ideology behind the chip industry’s significant process over the year. Samsung is highlighting today that it can squeeze a bit more out of Moore’s Law.

Simply put, Moore’s Law charts a doubling of transistors for a particular chip area every couple of years but that has recently been slowing down. Transistors are the crucial components of a processor, they can be best described as small electronic switches that process data. It has been difficult to stick to Moore’s Law as the scale of chip components continues to shrink.

We have been hearing that Samsung will start using extreme UV (EUV) lithography technology for chip manufacturing since last year. The company today confirmed that its 7LPP (7nm Low Power Plus) process technology is the first in its roadmap to use the EUV lithography solution and that it will start developing chips on this process in the second half of this year.

Next up on its roadmap is 5LPE (5nm Low Power Early) which will benefit from further innovation from the 7LPP process and allow for greater area scaling and ultra-low power improvements. Samsung will follow that up with 4LPE/LPP (4nm Low Power Early/Plus) by using its highly mature and verified FinFET technology. It’s going to be the last generation of FinFET, providing a smaller cell size and improved performance.

Samsung has even detailed in its roadmap a new manufacturing process that it’s planning based on 3-nanometer technology. Its 3GAAE/GAAP (3nm Gate-All-Around Early/Plus) process nodes will use GAA, the next-generation device architecture. Samsung will work around the physical scaling and performance limitations of the FinFET architecture by developing its unique GAA technology MBCFET (Multi-Bridge-Channel FET).

What Samsung hasn’t detailed today is how long it’s going to take the company to realize all of these technology improvements after the 7nm process starts producing chips later this year. It hasn’t talked about how the cost per transistor will change as it goes down the roadmap and development on the more complex processes begins to get more expensive.

Source Business semiconductor
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