Samsung held its annual SAFE (Semiconductor Advanced Foundry Ecosystem) Forum event earlier today. At the third edition of the company's annual event, Samsung Foundry's advanced semiconductor technologies were discussed with its partners and clients. The three main topics covered during the event were 3nm GAA (Gate-All-Around), AI (Artificial Intelligence), and 2.5D/3D semiconductor packaging.
The event included 7 plenary talks and 76 sessions about semiconductor technologies. The company said that it is expanding its chip foundry ecosystem by focusing on Cloud, DSP (Design Solution Partner), EDA (Electronic Design Automation), IP (intellectual property), and packaging solutions.
Along with its foundry partners, Samsung has already reserved over 3,600 IPs and 80 certified EDA tools. These technologies were developed and verified by Samsung and its partners. The company has even developed high-performance computing-specific foundation IPs that include memory compilers, standard cell libraries, 100Gbps Serializer-Deserializer (SerDes) interfaces, and 2.5D/3D multi-die integration.
Samsung developed its 3nm GAA chip fabrication technology and combined it with 2.5D and 3D chip packaging solutions for faster performance and lower power consumption. The company's partners can use EDA tools for chip design and analysis. The company has even created a platform where its partners can use GPUs for efficient chip design verification.
The company had recently announced its H-Cube chip packaging technology. It used the SAFE-Outsourced Semiconductor Assembly and Test (OSAT) ecosystem for the co-development of H-Cube with its partners. The company wants to go beyond Moore's law for future chip fabrication development.
SAFE-CDP (Cloud Design Platform) can be used by Samsung's partners and chip clients for designing. The company has now improved it to work in a hybrid environment so that its clients can use it along with their conventional design environments. With SAFE-DSP, Samsung and its partners can help fabless chip companies in implementing their design ideas into custom products using Samsung's advanced fabrication technologies.
Samsung's partners, including ARM, Ansys, Cadence, Siemens EDA, and Synopsys, appear quite excited about Samsung's upcoming 3nm GAA fabrication process and 2.5D/3D packaging technologies.
Ryan Lee, Senior Vice President and Head of Foundry Design Platform Development at Samsung Electronics, said, “In the rapidly changing data-centric era, Samsung and its foundry partners have made great strides responding to increasing customers demand and to support their success by providing powerful solutions. With the support of our SAFE program, Samsung will lead the realization of the vision ‘Performance Platform 2.0'.”
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